andynicholson/Ostomachion

NEORV32 RISC-V SoC running Zephyr RTOS on FPGA bare metal - with an extensible accelerator pipeline architecture, including an DMA-enabled programmable spectral filter pipeline - wrapped in C++20 HAL from fabric to std::span.

语言：C · GitHub 星标：18 · Fork：2

话题：fpga · neorv32 · rtos · vhdl · vivado · zephyr-rtos

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